Description: 本程序使用vhdl编写的jtag接口实现程序,其中有些功能未能实现,希望有人能够帮忙完善!-vhdl the procedures used to prepare the jtag interface procedures, which some of them did not materialize, hope someone can help perfect! Platform: |
Size: 86016 |
Author:马斌 |
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Description: 实现了串行通信接口的全部功能,符合RS-232-C标准的完整UART模块源代码,中文注解,清晰易懂,经过严格仿真测试,绝对好用。-a serial communication interface of all functions, with RS-232-C standard UART modules complete source code, Chinese notes, lucid, after a rigorous simulation tests, absolutely useful. Platform: |
Size: 462848 |
Author:张海 |
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Description: altera USB blaste 制作全套资料。包括原理图、93LC46的配置文件和CPLD的VHDL源程序。-altera USB blaste produced full set of information. Including drawings, 93LC46 configuration files and CPLD VHDL source. Platform: |
Size: 137216 |
Author:xuphone |
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Description: 描述了使用FPGA接口PDIUSBD12开发USB接口的流程.-Describes the use of FPGA Interface USB interface PDIUSBD12 development flow. Platform: |
Size: 141312 |
Author:玄冰 |
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Description: usart的verilog代码.rar
包括很多的FPGA ip 源码,可以直接应用
uart_vhdl.zip
sl811usb包含源程序.rar
mc8051_design.zip
mcpu_1[1].05.zip
minicpu.zip
mmc_lark_original.zip
-USART the Verilog code. rar, including many of the FPGA ip source, can be applied directly uart_vhdl.zipsl811usb contains the source code. rarmc8051_design.zipmcpu_1 [1] .05. zipminicpu.zipmmc_lark_original.zip Platform: |
Size: 5391360 |
Author:钟阳 |
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Description: USB 通用串行总线技术规范简介,这个是中文的.找了好久啊!-USB Universal Serial Bus specification Introduction, is that this is in Chinese. Looking for a long time ah! Platform: |
Size: 40960 |
Author:Liziler |
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